(China (Mainland))
Product Summary
The LH28F800BJE-PBTL90 is a high-performance 8M-bit Boot Block Flash memory organized as 512K-word of 16 bits or 1Mbyte of 8 bits. The 512K-word/1M-byte of data is arranged in two 4K-word/8K-byte boot blocks, six 4K-word/8Kbyte parameter blocks and fifteen 32K-word/64K-byte main blocks which are individually erasable, lockable and unlockable in-system. The dedicated VCCW pin gives complete data protection when VCCW≤VCCWLK. A Command User Interface (CUI) serves as the interface between the system processor and internal operation of the LH28F800BJE-PBTL90. A valid command sequence written to the CUI initiates device automation. An internal Write State Machine (WSM) automatically executes the algorithms and timings necessary for block erase, full chip erase, word/byte write and lock-bit configuration operations.
Parametrics
LH28F800BJE-PBTL90 absolute maximum ratings: (1)Operating Temperature: 0℃ to +70℃; (2)Storage Temperature During under Bias: -10℃ to +80℃; During non Bias: -65℃ to +125℃; (3)Voltage On Any Pin (except VCC and VCCW): -0.5V to VCC+0.5V; (4)VCC Supply Voltage: -0.2V to +4.6V; (5)VCCW Supply Voltage: -0.2V to +13.0V; (6)Output Short Circuit Current: 100mA.
Features
LH28F800BJE-PBTL90 features: (1)Low Voltage Operation; (2)OTP(One Time Program) Block; (3)User-Configurable ×8 or ×16 Operation; (4)High-Performance Read Access Time; (5)Operating Temperature: 0℃ to +70℃; (6)Low Power Management; (7)Optimized Array Blocking Architecture; (8)Extended Cycling Capability; (9)Enhanced Automated Suspend Options; (10)Enhanced Data Protection Features; (11)Automated Block Erase, Full Chip Erase, Word/Byte Write and Lock-Bit Configuration; (12)SRAM-Compatible Write Interface; (13)Industry-Standard Packaging, 48-Lead TSOP; (14)ETOXTM Nonvolatile Flash Technology; (15)CMOS Process (P-type silicon substrate); (16)Not designed or rated as radiation hardened.
Diagrams
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